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authorGeert Uytterhoeven <geert+renesas@glider.be>2020-05-05 09:44:13 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-05-05 09:44:13 +0200
commitca0762ee449737278ed44f0f766b50e025931abf (patch)
tree0a191c572b478edb1e335fe6130242bbc6b3e34c /tools/perf/scripts/python/export-to-postgresql.py
parentarm64: dts: renesas: Fix IOMMU device node names (diff)
parentclk: renesas: Add r8a7742 CPG Core Clock Definitions (diff)
downloadwireguard-linux-ca0762ee449737278ed44f0f766b50e025931abf.tar.xz
wireguard-linux-ca0762ee449737278ed44f0f766b50e025931abf.zip
Merge tag 'renesas-r8a7742-dt-binding-defs-tag' into renesas-arm-dt-for-v5.8
Renesas RZ/G1H DT Binding Definitions Clock and Power Domain definitions for the Renesas RZ/G1H (R8A7742) SoC, shared by driver and DT source files.
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