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| author |   Kwanghoon Son <k.son@samsung.com> | 2024-08-09 20:54:12 +0900 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-08-11 14:30:04 +0200 |
| commit | ccb41c445a3e9506ef43fe33867a356048e41477 (patch) | |
| tree | 2d7580852f1dc7e6fca4f9c58fa2a37d8409d31b /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: clock: exynos7885: Add indices for USB clocks (diff) | |
| download | wireguard-linux-ccb41c445a3e9506ef43fe33867a356048e41477.tar.xz wireguard-linux-ccb41c445a3e9506ef43fe33867a356048e41477.zip | |
dt-bindings: clock: exynosautov9: add dpum clock
Add dpum clock definitions and compatibles.
Also used clock name 'bus' instead of full clock name
dout_clkcmu_dpum_bus like other board cmu schema (GS101).
Signed-off-by: Kwanghoon Son <k.son@samsung.com>
Link: https://lore.kernel.org/r/20240809-clk_dpum-v3-1-359decc30fe2@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions