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| author |   Christian Marangi <ansuelsmth@gmail.com> | 2024-06-11 13:35:33 +0200 |
|---|---|---|
| committer |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2024-06-11 16:05:24 +0200 |
| commit | ce5cdd3b05216b704a704f466fb4c2dff3778caf (patch) | |
| tree | 525c451aa77f9522519f836df3ce9fefffc825d5 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | MIPS: pci: lantiq: restore reset gpio polarity (diff) | |
| download | wireguard-linux-ce5cdd3b05216b704a704f466fb4c2dff3778caf.tar.xz wireguard-linux-ce5cdd3b05216b704a704f466fb4c2dff3778caf.zip | |
mips: bmips: BCM6358: make sure CBR is correctly set
It was discovered that some device have CBR address set to 0 causing
kernel panic when arch_sync_dma_for_cpu_all is called.
This was notice in situation where the system is booted from TP1 and
BMIPS_GET_CBR() returns 0 instead of a valid address and
!!(read_c0_brcm_cmt_local() & (1 << 31)); not failing.
The current check whether RAC flush should be disabled or not are not
enough hence lets check if CBR is a valid address or not.
Fixes: ab327f8acdf8 ("mips: bmips: BCM6358: disable RAC flush for TP1")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions