diff options
| author |   Jia-Wei Chang <jia-wei.chang@mediatek.com> | 2023-03-24 18:11:28 +0800 |
|---|---|---|
| committer |   Viresh Kumar <viresh.kumar@linaro.org> | 2023-03-30 09:20:02 +0530 |
| commit | d51e106240bc755cbe59634b70d567c192b045b2 (patch) | |
| tree | 04627dac61ffb58678778e3c3f33b8fc717a352c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | cpufreq: mediatek: fix passing zero to 'PTR_ERR' (diff) | |
| download | wireguard-linux-d51e106240bc755cbe59634b70d567c192b045b2.tar.xz wireguard-linux-d51e106240bc755cbe59634b70d567c192b045b2.zip | |
cpufreq: mediatek: fix KP caused by handler usage after regulator_put/clk_put
Any kind of failure in mtk_cpu_dvfs_info_init() will lead to calling
regulator_put() or clk_put() and the KP will occur since the regulator/clk
handlers are used after released in mtk_cpu_dvfs_info_release().
To prevent the usage after regulator_put()/clk_put(), the regulator/clk
handlers are addressed in a way of "Free the Last Thing Style".
Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
Fixes: 4b9ceb757bbb ("cpufreq: mediatek: Enable clocks and regulators")
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Suggested-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions