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| author |   Thierry Reding <treding@nvidia.com> | 2021-11-12 13:35:35 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-16 16:43:49 +0100 |
| commit | d9203d081a618fc8b3469b24f959495eaa138890 (patch) | |
| tree | af53539a9d04a1e0776d9810182d9ce628218e9e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: tegra: Document Jetson AGX Orin (and devkit) (diff) | |
| download | wireguard-linux-d9203d081a618fc8b3469b24f959495eaa138890.tar.xz wireguard-linux-d9203d081a618fc8b3469b24f959495eaa138890.zip | |
dt-bindings: sram: Document NVIDIA Tegra SYSRAM
Tegra SoCs have extra on-chip RAM that can be used for inter-processor
communication. Tegra186 and later make use of it to establish a two-way
channel between the CCPLEX and BPMP. Add missing compatible strings for
Tegra186 and Tegra194 as well as a new compatible string for Tegra234.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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