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| author |   Claudiu Manoil <claudiu.manoil@nxp.com> | 2019-11-14 17:03:21 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-11-15 12:32:16 -0800 |
| commit | dc3de2a294eab8b1375f96eb4cf2a1d5edfcc9ab (patch) | |
| tree | 7ba8008564e6b6dfafe0d21608aae23aec6f5212 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | net: mscc: ocelot: move resource ioremap and regmap init to common code (diff) | |
| download | wireguard-linux-dc3de2a294eab8b1375f96eb4cf2a1d5edfcc9ab.tar.xz wireguard-linux-dc3de2a294eab8b1375f96eb4cf2a1d5edfcc9ab.zip | |
net: mscc: ocelot: filter out ocelot SoC specific PCS config from common path
The adjust_link routine should be generic enough to be (re)used by
any SoC that integrates a switch core compatible with the Ocelot
core switch driver. Currently all configurations are generic except
for the PCS settings that are SoC specific. Move these out to the
Ocelot SoC/board instance.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions