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| author |   Conor Dooley <conor.dooley@microchip.com> | 2023-03-30 18:32:56 +0100 |
|---|---|---|
| committer |   Rob Herring <robh@kernel.org> | 2023-04-04 12:12:13 -0500 |
| commit | dc8ea9204b242cd93e63585396ac7d13f622802d (patch) | |
| tree | 1073f0a5dc0669c08b65a4523185e386466aff4c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: timer: convert timer/amlogic,meson6-timer.txt to dt-schema (diff) | |
| download | wireguard-linux-dc8ea9204b242cd93e63585396ac7d13f622802d.tar.xz wireguard-linux-dc8ea9204b242cd93e63585396ac7d13f622802d.zip | |
dt-bindings: move cache controller bindings to a cache directory
There's a bunch of bindings for (mostly l2) cache controllers
scattered to the four winds, move them to a common directory.
I renamed the freescale l2cache.txt file, as while that might make sense
when the parent dir is fsl, it's confusing after the move.
The two Marvell bindings have had a "marvell," prefix added to match
their compatibles.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230330173255.109731-1-conor@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions