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| author |   Katsuhiro Suzuki <katsuhiro@katsuster.net> | 2018-11-18 13:18:02 +0900 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2018-11-19 14:42:04 +0100 |
| commit | df7b1f2e0a4ae0fceff261e29cde63dafcf2360f (patch) | |
| tree | 4fd6d8ec624033074417faa29200a3cc66e1ef56 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: rockchip: fix I2S1 clock gate register for rk3328 (diff) | |
| download | wireguard-linux-df7b1f2e0a4ae0fceff261e29cde63dafcf2360f.tar.xz wireguard-linux-df7b1f2e0a4ae0fceff261e29cde63dafcf2360f.zip | |
clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328
This patch fixes mistakes in HCLK_I2S1_8CH for running I2S1
successfully.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions