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| author |   Roger Quadros <rogerq@ti.com> | 2017-03-13 13:53:16 +0200 |
|---|---|---|
| committer |   Tony Lindgren <tony@atomide.com> | 2017-03-28 14:09:58 -0700 |
| commit | e2d54fe76997301b49311bde7ba8ef52b47896f9 (patch) | |
| tree | 3591709b562f1b18186558052baf9566f268ecfb /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: DRA7: hwmod: Fix DCAN1 stuck in transition (diff) | |
| download | wireguard-linux-e2d54fe76997301b49311bde7ba8ef52b47896f9.tar.xz wireguard-linux-e2d54fe76997301b49311bde7ba8ef52b47896f9.zip | |
ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss
It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
is in use then there are random chances that the usb_otg_ss module
will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3.
Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
fixes this issue.
We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
issue or not so don't add this flag for those instances.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions