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| author |   Aurabindo Pillai <aurabindo.pillai@amd.com> | 2022-09-29 11:15:12 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-10-10 17:17:42 -0400 |
| commit | e50f67cf5e168d92e24cfb61fb11f2f0a35708cd (patch) | |
| tree | e7b64508c751672365b987ac6102b2fe93a94268 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amd/display: Use correct pixel clock to program DTBCLK DTO's (diff) | |
| download | wireguard-linux-e50f67cf5e168d92e24cfb61fb11f2f0a35708cd.tar.xz wireguard-linux-e50f67cf5e168d92e24cfb61fb11f2f0a35708cd.zip | |
drm/amd/display: Do not trigger timing sync for phantom pipes
[Why&How]
Doing timing sync seqence for phantom pipes will not go through since
they are not fully programmed like normal pipes. Skip the sequence on
such pipes
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions