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| author |   Nagarjuna Kristam <nkristam@nvidia.com> | 2020-02-10 13:41:41 +0530 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2020-03-12 12:14:27 +0100 |
| commit | e74db5a5b4876bfea01ee58f5f2e66af13d7f5cd (patch) | |
| tree | f68e83e4f217ae7f1476a8d07781f69d8ae86176 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: tegra: Update OTG port entries for Jetson TX2 (diff) | |
| download | wireguard-linux-e74db5a5b4876bfea01ee58f5f2e66af13d7f5cd.tar.xz wireguard-linux-e74db5a5b4876bfea01ee58f5f2e66af13d7f5cd.zip | |
arm64: tegra: Add XUDC node for Tegra210
Tegra210 has one XUSB device mode controller, which can be operated in
HS and SS modes. Add DT entry for XUSB device mode controller.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions