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| author |   Shunli Wang <shunli.wang@mediatek.com> | 2016-11-04 15:43:05 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@codeaurora.org> | 2016-11-08 15:59:49 -0800 |
| commit | e9862118272aa528e35e54ef9f1e35c217870fd7 (patch) | |
| tree | 8dc89a1e94dfef635dab7ac98d423cda5247627a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: pxa mark dummy helper as 'inline' (diff) | |
| download | wireguard-linux-e9862118272aa528e35e54ef9f1e35c217870fd7.tar.xz wireguard-linux-e9862118272aa528e35e54ef9f1e35c217870fd7.zip | |
clk: mediatek: Add MT2701 clock support
Add MT2701 clock support, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions