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| author |   Tariq Toukan <tariqt@mellanox.com> | 2017-07-10 12:52:36 +0300 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@mellanox.com> | 2018-03-30 16:16:17 -0700 |
| commit | ea3886cab76f1026a5db988fa6fad997e98f3a32 (patch) | |
| tree | 618f777b231ae9ff7f9a85ac1dd0850638f5a3d9 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | net/mlx5e: Do not busy-wait for UMR completion in Striding RQ (diff) | |
| download | wireguard-linux-ea3886cab76f1026a5db988fa6fad997e98f3a32.tar.xz wireguard-linux-ea3886cab76f1026a5db988fa6fad997e98f3a32.zip | |
net/mlx5e: Use inline MTTs in UMR WQEs
When modifying the page mapping of a HW memory region
(via a UMR post), post the new values inlined in WQE,
instead of using a data pointer.
This is a micro-optimization, inline UMR WQEs of different
rings scale better in HW.
In addition, this obsoletes a few control flows and helps
delete ~50 LOC.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions