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| author |   Vladimir Stempen <vladimir.stempen@amd.com> | 2022-09-22 15:03:05 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-10-10 17:14:46 -0400 |
| commit | eae2331899f9dcc923d37d1d753f2de847c92359 (patch) | |
| tree | 9a3ce36b159280c90243379b6549b41a66e71afd /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Revert "drm/amd/display: skip commit minimal transition state" (diff) | |
| download | wireguard-linux-eae2331899f9dcc923d37d1d753f2de847c92359.tar.xz wireguard-linux-eae2331899f9dcc923d37d1d753f2de847c92359.zip | |
drm/amd/display: properly configure DCFCLK when enable/disable Freesync
[Why]
Bandwidth validation is using Freesync parameters
from previous Freesync state.
Bandwidth validation ignores DCFCLK calculated
after Freesync parameters are configured
[How]
Set Freesync bandwidth parameters to its default
state before running bandwidth validation.
Take DCFCLK calculated after Freesync bandwidth
parameters are assigned and bandwidth is
recalculated.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Vladimir Stempen <vladimir.stempen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions