diff options
author | 2024-06-17 11:13:30 +0200 | |
---|---|---|
committer | 2024-06-27 15:24:41 +0800 | |
commit | edfea889a049abe80f0d55c0365bf60fbade272f (patch) | |
tree | b48571c77d5941ec2665867a555cfb94d48c74cd /tools/perf/scripts/python/export-to-postgresql.py | |
parent | ARM: dts: imx6qdl-kontron-samx6i: fix phy-mode (diff) | |
download | wireguard-linux-edfea889a049abe80f0d55c0365bf60fbade272f.tar.xz wireguard-linux-edfea889a049abe80f0d55c0365bf60fbade272f.zip |
ARM: dts: imx6qdl-kontron-samx6i: fix PHY reset
The PHY reset line is connected to both the SoC (GPIO1_25) and
the CPLD. We must not use the GPIO1_25 as it will drive against
the output buffer of the CPLD. Instead there is another GPIO
(GPIO2_01), an input to the CPLD, which will tell the CPLD to
assert the PHY reset line.
Fixes: 2a51f9dae13d ("ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module")
Fixes: 5694eed98cca ("ARM: dts: imx6qdl-kontron-samx6i: move phy reset into phy-node")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions