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| author |   Alvin Lee <Alvin.Lee2@amd.com> | 2024-08-08 10:19:54 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2024-08-27 17:52:01 -0400 |
| commit | f0b7dcf25834afd17df316367dfe5d4c890c713c (patch) | |
| tree | eecbd3d7e507fecdff2eeec207ea99deec53a789 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amd/display: guard write a 0 post_divider value to HW (diff) | |
| download | wireguard-linux-f0b7dcf25834afd17df316367dfe5d4c890c713c.tar.xz wireguard-linux-f0b7dcf25834afd17df316367dfe5d4c890c713c.zip | |
drm/amd/display: Wait for all pending cleared before full update
[Description]
Before every full update we must wait for all pending updates to be
cleared - this is particularly important for minimal transitions
because if we don't wait for pending cleared, it will be as if
there was no minimal transition at all. In OTG we must read 3 different
status registers for pending cleared, one specifically for OTG updates,
one specifically for OPTC updates, and the last for surface related
updates
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions