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authorAlexander Stein <alexander.stein@ew.tq-group.com>2024-01-10 11:00:48 +0100
committerShawn Guo <shawnguo@kernel.org>2024-02-05 17:18:03 +0800
commitf78835d1e616cc95d16f6871a97fd2f964644f93 (patch)
tree13ff50fac605badabfbd5d324813c598a3a07007 /tools/perf/scripts/python/export-to-postgresql.py
parentarm64: dts: imx8mp-verdin: Label ldo5 and link to usdhc2 (diff)
downloadwireguard-linux-f78835d1e616cc95d16f6871a97fd2f964644f93.tar.xz
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arm64: dts: imx8mp: reparent MEDIA_MIPI_PHY1_REF to CLK_24M
This is already done in dsi node, introduced in commit eda09fe149df4 ("arm64: dts: imx8mp: Add display pipeline components"). This needs to be applied to csi nodes as well or the clock might be busy if both csi and dsi nodes are enabled. Fixes error: clk: failed to reparent media_mipi_phy1_ref to osc_24m: -16 Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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