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| author |   Jerome Brunet <jbrunet@baylibre.com> | 2018-12-03 18:16:38 +0100 |
|---|---|---|
| committer |   Kevin Hilman <khilman@baylibre.com> | 2018-12-04 17:04:39 -0800 |
| commit | fa3abfb6943ef2976deda78d83788a1352963f47 (patch) | |
| tree | 8b390962cb6c5b60be398c28890b1d27bc776fa4 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: meson-axg: remove alternate xtal (diff) | |
| download | wireguard-linux-fa3abfb6943ef2976deda78d83788a1352963f47.tar.xz wireguard-linux-fa3abfb6943ef2976deda78d83788a1352963f47.zip | |
dt-bindings: clk: meson: add ao controller clock inputs
Add the clock inputs of amlogic AO clock controller
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions