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author | 2020-09-21 18:46:44 +0930 | |
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committer | 2020-09-25 10:14:12 +0930 | |
commit | fe100b382c1c052b63c14091fd8bb3fe932453ae (patch) | |
tree | abac7568839e6322448b4ae8b053e003fafc0623 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | soc: aspeed: Add soc info driver (diff) | |
download | wireguard-linux-fe100b382c1c052b63c14091fd8bb3fe932453ae.tar.xz wireguard-linux-fe100b382c1c052b63c14091fd8bb3fe932453ae.zip |
ARM: dts: aspeed: Add silicon id node
This register describes the silicon id and chip unique id. It varies
between CPU revisions, but is always part of the SCU.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200921091644.133107-4-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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