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author | 2017-03-01 10:08:12 +0100 | |
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committer | 2017-03-13 15:51:10 +0000 | |
commit | ff18e1ef04e2073889569b07a5ddd54a6527917f (patch) | |
tree | b953274f65612dd956ffca587acdcbc64ad888bc /tools/perf/scripts/python/export-to-postgresql.py | |
parent | spi/bcm63xx: fix typo in bcm63xx_spi_max_length breaking compilation (diff) | |
download | wireguard-linux-ff18e1ef04e2073889569b07a5ddd54a6527917f.tar.xz wireguard-linux-ff18e1ef04e2073889569b07a5ddd54a6527917f.zip |
spi/bcm63xx-hsspi: allow providing clock rate through a second clock
The HSSPI block actually has two clock inputs, one for gating the block,
and one for the PLL rate. To allow these to be represented as two clocks,
add support for retrieving the rate from a separate "pll" clock, if the
"hsspi" clock does not provide one.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions