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| author |   Jagan Teki <jagan@amarulasolutions.com> | 2019-01-28 14:28:45 +0530 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2019-01-28 12:02:40 +0100 |
| commit | ff29f13e93a68eb31571db45539371557107683a (patch) | |
| tree | 032bb32ec3b26dc68681eb8555fe4111ca987d75 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: allwinner: h6: Move GIC device node fix base address ordering (diff) | |
| download | wireguard-linux-ff29f13e93a68eb31571db45539371557107683a.tar.xz wireguard-linux-ff29f13e93a68eb31571db45539371557107683a.zip | |
arm64: dts: allwinner: a64: Add A64 CSI controller
Add dts node details for Allwinner A64 CSI controller.
A64 CSI has similar features as like in H3, but the CSI_SCLK
need to update it to 300MHz than default clock rate.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions