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authorYang Chen <yang.chen@quantatw.com>2024-06-26 21:03:19 +0800
committerJoel Stanley <joel@jms.id.au>2024-08-22 13:07:12 +0930
commitfff89fba6ff7f9746d4835be7a63f54b992f6c2f (patch)
treedc0448e4e20369fece7fdadd4e444876d9b24df5 /tools/perf/scripts/python/export-to-postgresql.py
parentARM: dts: aspeed: minerva: add eeprom on i2c bus (diff)
downloadwireguard-linux-fff89fba6ff7f9746d4835be7a63f54b992f6c2f.tar.xz
wireguard-linux-fff89fba6ff7f9746d4835be7a63f54b992f6c2f.zip
ARM: dts: aspeed: minerva: change RTC reference
Change the RTC reference from on-chip to externel on i2c bus 9 and address is 0x51. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-5-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
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