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| author |   Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> | 2022-08-05 18:04:08 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-08-16 18:09:32 -0400 |
| commit | 1af9add1f1512b10d9ce44ec7137612bc81ff069 (patch) | |
| tree | 55dfdfff8868197402e77edc81c9c191ba98e17a /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | drm/amd/display: add chip revision to DCN32 (diff) | |
| download | wireguard-linux-1af9add1f1512b10d9ce44ec7137612bc81ff069.tar.xz wireguard-linux-1af9add1f1512b10d9ce44ec7137612bc81ff069.zip | |
drm/amdgpu: Add decode_iv_ts helper for ih_v6 block
Was missing. Add it.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions