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| author |   Elaine Zhang <zhangqing@rock-chips.com> | 2018-06-15 10:16:51 +0800 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2018-07-06 19:17:57 +0200 |
| commit | 243229b11121fbc90d9ee875292dfc75ecf53040 (patch) | |
| tree | e4f213f567c9bb932a7e5fae6153c0826c9c87e5 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | clk: rockchip: add support for half divider (diff) | |
| download | wireguard-linux-243229b11121fbc90d9ee875292dfc75ecf53040.tar.xz wireguard-linux-243229b11121fbc90d9ee875292dfc75ecf53040.zip | |
clk: rockchip: add clock controller for px30
Add the clock tree definition for the new px30 SoC.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions