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| author |   Vladimir Zapolskiy <vz@mleia.com> | 2019-01-26 00:03:47 +0200 |
|---|---|---|
| committer | Vladimir Zapolskiy <vz@mleia.com> | 2019-01-26 00:06:26 +0200 |
| commit | 5bd7f4b537c28aa77541df70ed2ac806794b0482 (patch) | |
| tree | 61a98c4217e6656e6821a0f28be9028628e28f67 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ARM: defconfig: lpc32xx: enable serial console on HS UART (diff) | |
| download | wireguard-linux-5bd7f4b537c28aa77541df70ed2ac806794b0482.tar.xz wireguard-linux-5bd7f4b537c28aa77541df70ed2ac806794b0482.zip | |
ARM: defconfig: lpc32xx: enable generic SRAM driver
NXP LPC32xx SoCs contain an IRAM area, which is supported by
the generic MMIO SRAM driver, enable the driver to be built
by default.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions