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| author |   Thierry Reding <treding@nvidia.com> | 2023-07-26 18:43:18 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2023-07-27 16:48:09 +0200 |
| commit | 6e752d4a2f5abfda9d395eec5ac28085e36e5c81 (patch) | |
| tree | cd7c9f22fe97e87345a46d47fadee91e23d8027c /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | arm64: tegra: Drop incorrect maxim,disable-etr on Smaug (diff) | |
| download | wireguard-linux-6e752d4a2f5abfda9d395eec5ac28085e36e5c81.tar.xz wireguard-linux-6e752d4a2f5abfda9d395eec5ac28085e36e5c81.zip | |
arm64: tegra: Remove {clock,reset}-names from VIC powergate
According to the device tree bindings, the powergate definition nodes
don't contain clock-names and reset-names properties, so remove them.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions