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| author |   Biju Das <biju.das.jz@bp.renesas.com> | 2023-07-12 16:13:42 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2023-07-25 11:41:09 +0200 |
| commit | bf8abcd7e7a804b825b11828d13c057e8678899a (patch) | |
| tree | 583d26c26fa59e4475b2511ff7882adadce3ba78 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | arm64: dts: renesas: rzg2lc-smarc-som: Add PHY interrupt support for ETH0 (diff) | |
| download | wireguard-linux-bf8abcd7e7a804b825b11828d13c057e8678899a.tar.xz wireguard-linux-bf8abcd7e7a804b825b11828d13c057e8678899a.zip | |
arm64: dts: renesas: rzg2lc-smarc-som: Enable PMIC and built-in RTC
Enable PMIC RAA215300 and the built-in RTC on the RZ/G2LC SMARC
EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230712151342.82690-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions