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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-07-30 13:15:41 +0200 |
|---|---|---|
| committer |   Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2023-08-02 07:44:24 +0300 |
| commit | dc1890b95e5088fa267dea9cadc20f833b961e29 (patch) | |
| tree | e8ac5f206a456cc31d9867cede4b5b16af019315 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ARM: dts: at91: ksz9477_evb: Add tx-internal-delay-ps property for port5 (diff) | |
| download | wireguard-linux-dc1890b95e5088fa267dea9cadc20f833b961e29.tar.xz wireguard-linux-dc1890b95e5088fa267dea9cadc20f833b961e29.zip | |
ARM: dts: microchip: split interrupts per cells
Each interrupt should be in its own cell. This is much more readable.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230730111542.98238-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions