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author | 2024-04-17 12:20:03 +0100 | |
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committer | 2024-04-22 09:46:21 +0200 | |
commit | e58d8e885b4e937145a96cd94bc890c2134ff640 (patch) | |
tree | f1c533e5b5e18822ec7f72bb7eba2219b1f363df /tools/perf/scripts/python/export-to-sqlite.py | |
parent | riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0/1 nodes (diff) | |
download | wireguard-linux-e58d8e885b4e937145a96cd94bc890c2134ff640.tar.xz wireguard-linux-e58d8e885b4e937145a96cd94bc890c2134ff640.zip |
arm64: dts: renesas: rzg3s-smarc-som: Enable eMMC by default
Enable eMMC by default on the RZ/G3S SMARC platform, as previously done
on RZ/G2L boards and other Renesas platforms.
The SW_CONFIG2 setting selects between the uSD0 card and eMMC. By setting
SW_CONFIG2 to SW_OFF, we select eMMC by default.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240417112003.428348-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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