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| author |   Arnd Bergmann <arnd@arndb.de> | 2019-02-15 17:47:17 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2019-02-15 20:38:18 +0100 |
| commit | e61c92005ead0ebaba11f3159eb4e578763085b6 (patch) | |
| tree | 3963764276d88b77410bc7fc15733a81c3593a18 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | Merge tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/fixes (diff) | |
| parent | ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+ (diff) | |
| download | wireguard-linux-e61c92005ead0ebaba11f3159eb4e578763085b6.tar.xz wireguard-linux-e61c92005ead0ebaba11f3159eb4e578763085b6.zip | |
Merge tag 'tegra-for-5.1-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes
ARM: tegra: Core changes for v5.1-rc1
This contains three fixes for resume from LP1 on Tegra30.
* tag 'tegra-for-5.1-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+
ARM: tegra: Fix DRAM refresh-interval clobbering on resume from LP1 on Tegra30
ARM: tegra: Fix missed EMC registers latching on resume from LP1 on Tegra30+
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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