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| author |   Khalid Manaa <khalidm@nvidia.com> | 2021-06-09 12:27:32 +0300 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@nvidia.com> | 2021-10-26 19:30:39 -0700 |
| commit | eaee12f046924eeb1210c7e4f3b326603ff1bd85 (patch) | |
| tree | 6e21b6bce7031aef538bf46fa7a9976456508b14 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | net/mlx5: Add SHAMPO caps, HW bits and enumerations (diff) | |
| download | wireguard-linux-eaee12f046924eeb1210c7e4f3b326603ff1bd85.tar.xz wireguard-linux-eaee12f046924eeb1210c7e4f3b326603ff1bd85.zip | |
net/mlx5e: Rename TIR lro functions to TIR packet merge functions
This series introduces new packet merge type, therefore rename lro
functions to packet merge to support the new merge type:
- Generalize + rename mlx5e_build_tir_ctx_lro to
mlx5e_build_tir_ctx_packet_merge.
- Rename mlx5e_modify_tirs_lro to mlx5e_modify_tirs_packet_merge.
- Rename lro bit in mlx5_ifc_modify_tir_bitmask_bits to packet_merge.
- Rename lro_en in mlx5e_params to packet_merge_type type and combine
packet_merge params into one struct mlx5e_packet_merge_param.
Signed-off-by: Khalid Manaa <khalidm@nvidia.com>
Signed-off-by: Ben Ben-Ishay <benishay@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions