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| author |   Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> | 2024-09-09 13:55:08 +0530 |
|---|---|---|
| committer |   Jakub Kicinski <kuba@kernel.org> | 2024-09-11 20:53:44 -0700 |
| commit | f845a027de66d1efeb8cb22020e2c50baebdc441 (patch) | |
| tree | c98bbb087aee67130209642c0f93e80c9e0d5dab /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | net: phy: microchip_t1s: add c45 direct access in LAN865x internal PHY (diff) | |
| download | wireguard-linux-f845a027de66d1efeb8cb22020e2c50baebdc441.tar.xz wireguard-linux-f845a027de66d1efeb8cb22020e2c50baebdc441.zip | |
net: ethernet: oa_tc6: enable open alliance tc6 data communication
Enabling Configuration Synchronization bit (SYNC) in the Configuration
Register #0 enables data communication in the MAC-PHY. The state of this
bit is reflected in the data footer SYNC bit.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com>
Link: https://patch.msgid.link/20240909082514.262942-9-Parthiban.Veerasooran@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions