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| author |   Anson Huang <anson.huang@nxp.com> | 2019-02-27 01:28:26 +0000 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2019-02-28 10:28:28 -0800 |
| commit | 0c91c11c7d62de9fea6f5520edb143a7199f3307 (patch) | |
| tree | 9a00b1bc1adc59af48831982532da17914e358b6 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | clk: imx: Refactor entire sccg pll clk (diff) | |
| download | wireguard-linux-0c91c11c7d62de9fea6f5520edb143a7199f3307.tar.xz wireguard-linux-0c91c11c7d62de9fea6f5520edb143a7199f3307.zip | |
clk: imx8mq: add GPIO clocks to clock tree
i.MX8MQ has clock gate for each GPIO bank, add them
into clock tree for GPIO driver to manage.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions