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| author |   Arnd Bergmann <arnd@arndb.de> | 2021-02-03 11:24:01 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2021-02-03 11:24:01 +0100 |
| commit | 459630a3ebb4110c571f103fbc2d8120be001e39 (patch) | |
| tree | 534101b122a863ce8882ba43a834366bea32fffd /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL (diff) | |
| parent | ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode (diff) | |
| download | wireguard-linux-459630a3ebb4110c571f103fbc2d8120be001e39.tar.xz wireguard-linux-459630a3ebb4110c571f103fbc2d8120be001e39.zip | |
Merge tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes
One fix for a phy-mode ethernet issue, and one to fix the display output on
SoCs with the Display Engine 2
* tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
soc: sunxi: mbus: Remove DE2 display engine compatibles
Link: https://lore.kernel.org/r/f8298059-f9ca-43b4-9e29-35bc0e0c9b15.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions