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| author |   Biju Das <biju.das.jz@bp.renesas.com> | 2022-10-05 12:18:55 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-17 10:23:52 +0200 |
| commit | 576d6b40dcceade7d77e88f63e621349c6937bc3 (patch) | |
| tree | 4bf09548b4560b8d08ff4476ddc383d3cfc04985 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | clk: renesas: r8a779g0: Add INTC-EX clock (diff) | |
| download | wireguard-linux-576d6b40dcceade7d77e88f63e621349c6937bc3.tar.xz wireguard-linux-576d6b40dcceade7d77e88f63e621349c6937bc3.zip | |
clk: renesas: r9a07g044: Add MTU3a clock and reset entry
Add MTU3a clock and reset entry to CPG driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221005111855.553436-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions