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author | 2021-04-20 16:17:14 +0800 | |
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committer | 2021-04-20 21:45:24 -0400 | |
commit | 5c88e3b86a88f14efa0a3ddd28641c6ff49fb9c4 (patch) | |
tree | bbc68d9850b0b4540120f33bc1780620963e9f4d /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | drm/amdgpu: Fix SDMA RAS error reporting on Aldebaran (diff) | |
download | wireguard-linux-5c88e3b86a88f14efa0a3ddd28641c6ff49fb9c4.tar.xz wireguard-linux-5c88e3b86a88f14efa0a3ddd28641c6ff49fb9c4.zip |
drm/amdgpu: Add mem sync flag for IB allocated by SA
The buffer of SA bo will be used by many cases. So it's better
to invalidate the cache of indirect buffer allocated by SA before
commit the IB.
Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions