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| author |   Anson Huang <anson.huang@nxp.com> | 2019-01-14 08:54:59 +0800 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2019-01-15 23:03:40 +0800 |
| commit | 6d45a4028c8a6bc0a1e92438283ef7d4ed6ffe71 (patch) | |
| tree | 05f1710067648f1d2d4ed96ec0238a133cb88958 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | ARM: imx: don't build ssi-fiq if not required (diff) | |
| download | wireguard-linux-6d45a4028c8a6bc0a1e92438283ef7d4ed6ffe71.tar.xz wireguard-linux-6d45a4028c8a6bc0a1e92438283ef7d4ed6ffe71.zip | |
ARM: imx: add i.MX7ULP cpuidle support
This patch adds cpuidle support for i.MX7ULP, 3 cpuidle
states supported as below:
1. WFI, just ARM wfi;
2. WAIT mode, mapped to SoC's partial stop mode #3;
3. STOP mode, mapped to SoC's partial stop mode #1.
In WAIT mode, system clock and bus clock will be enabled;
In STOP mode, system clock and bus clock will be disabled.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions