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| author |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-01-13 14:05:40 +0200 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2023-01-18 22:50:01 -0600 |
| commit | 6fb03dd0b40aa83a3a04390ef539f1547b77ca1d (patch) | |
| tree | c89394e1ce6a7b7c8869a12d939c6a8e4979d6b8 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | clk: qcom: cpu-8996: move qcom_cpu_clk_msm8996_acd_init call (diff) | |
| download | wireguard-linux-6fb03dd0b40aa83a3a04390ef539f1547b77ca1d.tar.xz wireguard-linux-6fb03dd0b40aa83a3a04390ef539f1547b77ca1d.zip | |
clk: qcom: cpu-8996: fix PLL configuration sequence
Switch both power and performance clocks to the GPLL0/2 (sys_apcs_aux)
before PLL configuration. Switch them to the ACD afterwards.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113120544.59320-11-dmitry.baryshkov@linaro.org
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions