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| author |   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-10-10 00:10:13 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-26 12:38:01 +0200 |
| commit | 772563aef2b46da86120d4c0d6865149e957b02d (patch) | |
| tree | 3c6a3544dc4040b9253f96ce2a3e42fc95e1b997 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | clk: renesas: r8a779g0: Add TPU clock (diff) | |
| download | wireguard-linux-772563aef2b46da86120d4c0d6865149e957b02d.tar.xz wireguard-linux-772563aef2b46da86120d4c0d6865149e957b02d.zip | |
clk: renesas: r9a07g044: Drop WDT2 clock and reset entry
WDT CH2 is specifically to check the operation of Cortex-M33 CPU and if
used from CA55 CPU would result in an unexpected behaviour. Hence drop
WDT2 clock and reset entries.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20221009231013.14791-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions