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| author |   Marek Vasut <marex@denx.de> | 2022-08-24 00:13:20 +0200 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2022-09-04 20:37:28 +0800 |
| commit | 8194a356226ce6f53e1d98b44c0436c583db89d2 (patch) | |
| tree | fa3031ae7cd62e86e16d6a7f5da2fe8eefb5616a /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | arm64: dts: freescale: verdin-imx8mp: fix atmel_mxt_ts reset polarity (diff) | |
| download | wireguard-linux-8194a356226ce6f53e1d98b44c0436c583db89d2.tar.xz wireguard-linux-8194a356226ce6f53e1d98b44c0436c583db89d2.zip | |
arm64: dts: imx8mm: Reverse CPLD_Dn GPIO label mapping on MX8Menlo
The CPLD_Dn GPIO assignment between SoM and CPLD has now been clarified
in schematic and the assignment is reversed. Update the DT to match the
hardware.
Fixes: 510c527b4ff57 ("arm64: dts: imx8mm: Add i.MX8M Mini Toradex Verdin based Menlo board")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions