diff options
author | 2023-06-06 15:44:28 -0700 | |
---|---|---|
committer | 2023-06-07 20:38:48 +0300 | |
commit | 9831a9d1841fb3188c46a13da30aecd96bd1bae6 (patch) | |
tree | 709882b564ccdd964bf745cdb0a9be118a0e7c6e /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | drm/i915: annotate maybe unused but set intel_crtc_state variables (diff) | |
download | wireguard-linux-9831a9d1841fb3188c46a13da30aecd96bd1bae6.tar.xz wireguard-linux-9831a9d1841fb3188c46a13da30aecd96bd1bae6.zip |
drm/i915/dp: Fix log level for "CDS interlane align done"
"CDS interlane align done" is a passing condition not an error.
Before adding new macros for logs it was drm_dbg_kms.
Fixes: f48eab290287 ("drm/i915/dp: Add link training debug and error printing helpers")
Cc: Imre Deak <imre.deak@intel.com>
CC: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230606224428.3791006-1-khaled.almahallawy@intel.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions