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| author |   Rengarajan S <rengarajan.s@microchip.com> | 2023-12-15 20:41:22 +0530 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-01-04 16:22:41 +0100 |
| commit | aba8290f368d965d49c929a283b3bf41783d3ada (patch) | |
| tree | ede9f4a59bc64d2853dd92e48ea054e6dbfdfbe8 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 8250: microchip: pci1xxxx: Add Syslock support for reading UART system registers (diff) | |
| download | wireguard-linux-aba8290f368d965d49c929a283b3bf41783d3ada.tar.xz wireguard-linux-aba8290f368d965d49c929a283b3bf41783d3ada.zip | |
8250: microchip: pci1xxxx: Add Burst mode reception support in uart driver for writing into FIFO
In PCI1XXXX C0 endpoint, support for Burst mode is added.
pci1xxxx_handle_irq checks the burst status and based on that
incoming characters are received in DWORDs, RX handling is done
in pci1xxxx_rx_burst. While reading the burst status the RX error
is checked and the corresponding error statistics are updated.
Signed-off-by: Rengarajan S <rengarajan.s@microchip.com>
Link: https://lore.kernel.org/r/20231215151123.41812-4-rengarajan.s@microchip.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions