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| author |   Chang S. Bae <chang.seok.bae@intel.com> | 2025-04-15 19:16:51 -0700 |
|---|---|---|
| committer |   Ingo Molnar <mingo@kernel.org> | 2025-04-16 09:44:13 +0200 |
| commit | b02dc185ee86836cf1d8a37b81349374e4018ee0 (patch) | |
| tree | 3b9b6b5a95f4dda38ba38ff5260ff1cf73a9dbcd /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | Merge branch 'x86/cpu' into x86/fpu, to pick up dependent commits (diff) | |
| download | wireguard-linux-b02dc185ee86836cf1d8a37b81349374e4018ee0.tar.xz wireguard-linux-b02dc185ee86836cf1d8a37b81349374e4018ee0.zip | |
x86/cpufeatures: Add X86_FEATURE_APX
Intel Advanced Performance Extensions (APX) introduce a new set of
general-purpose registers, managed as an extended state component via the
xstate management facility.
Before enabling this new xstate, define a feature flag to clarify the
dependency in xsave_cpuid_features[]. APX is enumerated under CPUID level
7 with EDX=1. Since this CPUID leaf is not yet allocated, place the flag
in a scattered feature word.
While this feature is intended only for userspace, exposing it via
/proc/cpuinfo is unnecessary. Instead, the existing arch_prctl(2)
mechanism with the ARCH_GET_XCOMP_SUPP option can be used to query the
feature availability.
Finally, clarify that APX depends on XSAVE.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Link: https://lore.kernel.org/r/20250416021720.12305-2-chang.seok.bae@intel.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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