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| author |   Xiangsheng Hou <xiangsheng.hou@mediatek.com> | 2022-07-25 20:02:05 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2022-08-28 22:04:50 +0100 |
| commit | b9320f545e2c91caf2a15f67537ef538928ca6af (patch) | |
| tree | 414731c02678c514a464e9b8f067d88bb01846ac /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | ASoC: amd: acp: Modify dai_id macros to be more generic (diff) | |
| download | wireguard-linux-b9320f545e2c91caf2a15f67537ef538928ca6af.tar.xz wireguard-linux-b9320f545e2c91caf2a15f67537ef538928ca6af.zip | |
dt-bindings: mediatek: Add axi clock in mt8173 dts example
For mt8173, it is needed to add the axi clock for dma mode.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220725120204.10834-1-xiangsheng.hou@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions