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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2021-06-10 15:34:50 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-06-10 15:34:50 +0200 |
| commit | c4bcdb3e30ea815e3ccf04a97b7b5373f8606bc8 (patch) | |
| tree | 2ca780282d1ff4bbd8a1f46f119073d4a108db99 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | arm64: dts: renesas: r8a779a0: Drop power-domains property from GIC node (diff) | |
| parent | dt-bindings: clock: Add r9a07g044 CPG Clock Definitions (diff) | |
| download | wireguard-linux-c4bcdb3e30ea815e3ccf04a97b7b5373f8606bc8.tar.xz wireguard-linux-c4bcdb3e30ea815e3ccf04a97b7b5373f8606bc8.zip | |
Merge tag 'renesas-r9a07g044-dt-binding-defs-tag' into renesas-arm-dt-for-v5.14
Renesas RZ/G2L DT Binding Definitions
Clock definitions for the Renesas RZ/G2L (R9A07G044) SoC, shared by
driver and DT source files.
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions