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| author |   Rajvi Jingar <rajvi.jingar@linux.intel.com> | 2023-12-18 20:22:12 -0800 |
|---|---|---|
| committer |   Hans de Goede <hdegoede@redhat.com> | 2023-12-19 16:48:22 +0100 |
| commit | d873f380525c502904737f592008d509cff20c78 (patch) | |
| tree | d92898d7f290fb1f19ee4f90a934867bb458353d /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | platform/x86/intel/pmc: Add regmap for Tiger Lake H PCH (diff) | |
| download | wireguard-linux-d873f380525c502904737f592008d509cff20c78.tar.xz wireguard-linux-d873f380525c502904737f592008d509cff20c78.zip | |
platform/x86/intel/pmc: Add PSON residency counter for Alder Lake
Add PSON register offsets for Alder Lake PCH that provides an access to
PSON residency counter.
Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com>
Link: https://lore.kernel.org/r/20231219042216.2592029-4-rajvi.jingar@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions