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| author |   Dong Aisheng <aisheng.dong@nxp.com> | 2021-05-21 11:12:48 +0800 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2021-06-12 16:17:02 +0800 |
| commit | dfda1fd16aa71c839e4002109b0cd15f61105ebb (patch) | |
| tree | ab9ac03d7a9f3dad33adf6ccb550bae5b450538d /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | arm64: dts: imx8mq: assign PCIe clocks (diff) | |
| download | wireguard-linux-dfda1fd16aa71c839e4002109b0cd15f61105ebb.tar.xz wireguard-linux-dfda1fd16aa71c839e4002109b0cd15f61105ebb.zip | |
arm64: dts: imx8: conn: fix enet clock setting
enet_clk_ref actually is sourced from internal gpr clocks
which needs a default rate. Also update enet lpcg clock
output names to be more straightforward.
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions