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| author |   Conor Dooley <conor.dooley@microchip.com> | 2023-02-16 13:15:12 +0000 |
|---|---|---|
| committer |   Arnd Bergmann <arnd@arndb.de> | 2023-02-16 22:08:25 +0100 |
| commit | e43efb6d713bca3855909a2f9caec280a2b0a503 (patch) | |
| tree | 7f71d71b489854f0c668b01f261b41bd6c39341b /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | Merge tag 'socfpga_dts_updates_for_v6.3_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt (diff) | |
| download | wireguard-linux-e43efb6d713bca3855909a2f9caec280a2b0a503.tar.xz wireguard-linux-e43efb6d713bca3855909a2f9caec280a2b0a503.zip | |
dt-bindings: riscv: correct starfive visionfive 2 compatibles
Using "va" and "vb" doesn't match what's written on the board, or the
communications from StarFive.
Switching to using the silkscreened version number will ease confusion &
the risk of another spin of the board containing a "conflicting" version
identifier.
As the binding has not made it into mainline yet, take the opportunity
to "correct" things.
Suggested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Link: https://lore.kernel.org/linux-riscv/Y+4AxDSDLyL1WAqh@wendy/
Fixes: 97b7ed072784 ("dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230216131511.3327943-1-conor.dooley@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions