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author | 2024-12-10 12:37:21 +0000 | |
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committer | 2024-12-10 12:37:21 +0000 | |
commit | 527acf5de4c060ebb3d1eb98c4acf21743c2cde7 (patch) | |
tree | 384e5b2c34fdd504bdf2083fe62afb178445e79c /tools/perf/scripts/python/gecko.py | |
parent | ASoC: sun4i-spdif: Add 24bit support (diff) | |
parent | ASoC: fsl_sai: Add sample rate constraint (diff) | |
download | wireguard-linux-527acf5de4c060ebb3d1eb98c4acf21743c2cde7.tar.xz wireguard-linux-527acf5de4c060ebb3d1eb98c4acf21743c2cde7.zip |
Add function to constrain rates
Merge series from Chancel Liu <chancel.liu@nxp.com>:
Platforms like i.MX93/91 only have one audio PLL. Some sample rates are
not supported. If the PLL source is used for 8kHz series rates, then
11kHz series rates can't be supported. Add common function to constrain
rates according to different clock sources.
In ASoC drivers switch to this new function.
Diffstat (limited to 'tools/perf/scripts/python/gecko.py')
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