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| author |   Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2013-04-12 00:42:22 -0700 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2013-06-07 14:24:48 +0900 |
| commit | 8d100c0454a9960c9bf0b67e07225db5d32cca83 (patch) | |
| tree | a24c2beb4c889dc295826b553cb63b98c35ad3d5 /tools/perf/scripts/python/netdev-times.py | |
| parent | ARM: shmobile: r8a7778: Register SDHI device (diff) | |
| download | wireguard-linux-8d100c0454a9960c9bf0b67e07225db5d32cca83.tar.xz wireguard-linux-8d100c0454a9960c9bf0b67e07225db5d32cca83.zip | |
ARM: shmobile: r8a7790: add main clock
Almost all clock needs main clock which is basis clock on r8a7790.
This patch adds it, and, set its parent/ratio via MD pin.
It is based on v0.05 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions